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general description the MAX11312 integrates a pixi?, 12-bit, multichannel, analog-to-digital converter (adc) and a 12-bit, multichannel, buffered digital-to-analog converter (dac) in a single integrated circuit. this device offers 12 mixed-signal high- voltage, bipolar ports, which are configurable as an adc analog input, a dac analog output, a general purpose input (gpi), a general-purpose output (gpo), or an analog switch terminal. one internal and two external temperature sensors track junction and environmental temperature. adjacent pairs of ports are configurable as a logic-level translator for open-drain devices or an analog switch. pixi ports provide highly flexible hardware configuration for 12-bit mixed-signal applications. the MAX11312 is best suited for applications that demand a mixture of analog and digital functions. each port is individually configurable with up to four selectable voltage ranges within the -10v to +10v range. the device allows for the averaging of 2, 4, 8, 16, 32, 64, or 128 adc samples from each adc-configured port to improve noise performance. a dac-configured output port can drive up to 25ma. the gpio ports can be programmed to user-defined logic levels, and a gpi coupled with a gpo forms a logic-level translator. internal and external temperature measurements monitor programmable conditions of minimum and maximum temperature limits, using the interrupt to notify the host if one or more conditions occur. the temperature measurement results are made available through the serial interface. the device features an internal, low-noise 2.5v voltage reference and provides the option to use external voltage references with separate inputs for the dac and adc. the MAX11312 uses a 400khz i 2 c-compatible serial interface, operating from a 5v analog supply and a 1.8v to 5.0v digital supply. the pixi port supply voltages operate from a wide -12.0v to +12.0v. the MAX11312 is available in a 32-pin tqfn, 5mm x 5mm package specified over the -40c to +105c temperature range. applications base-station rf power device bias controllers system supervision and control power-supply monitoring industrial control and automation control for optical components benefts and features 12 configurable mixed-signal ports maximize design flexibility across platforms ? up to 12 12-bit adc inputs - single-ended, differential, or pseudo-differential - range options: 0 to 2.5v, 5v, 0 to +10v, -10v to 0v - programmable sample averaging per adc port - unique voltage reference for each adc pixi port ? up to 12 12-bit dac outputs - range options: 5v, 0 to +10v, -10v to 0v - 25ma current drive capability with overcurrent protection ? up to 12 general-purpose digital i/os - 0 to +5v gpi input range - 0 to +2.5v gpi programmable threshold range - 0 to +10v gpo programmable output range - logic-level-shifting between any two pins ? 60 analog switch between adjacent pixi ports ? internal/external temperature sensors, 1c accuracy adapts to specific application requirements and allows for easy reconfiguration as system needs change configurability of functions enables optimized pcb layout reduces bom cost with fewer components in a small footprint ? 25mm 2 32-pin tqfn ordering information appears at end of data sheet. pixi is a trademark of maxim integrated products, inc.. 19-7945; rev 0; 2/16 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio evaluation kit available
maxim integrated 2 functional diagram dac sequencer int cnvt internal reference adc 2.5v 2.5v serial interface and digital core adc sequencer 12 dac gpi gpo ext and int temp sensors temperature monitors dvdd MAX11312 reference mux (0 x 5) pixi port manager clock generator (6 y 11) ad1 ad0 scl sda dgnd agnd1 agnd avssio dac_ref adc_int_ref avdd avddio 12 12 12 12 d1p d1n d0p d0n port[x+1] port[x] port[y+1] port[y] MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
dvdd to dgnd ....................................................... -0.3v to +6v avdd to agnd ....................................................... -0.3v to +6v avddio to avssio ............................................... -0.3v to +25v avddio to agnd .................................................. -0.3v to +17v avssio to agnd .................................................. -14v to +0.3v agnd to agnd1 .................................................. -0.3v to +0.3v agnd to dgnd ................................................... -0.3v to +0.3v agnd1 to dgnd ................................................. -0.3v to +0.3v (port0 to port11) to agnd ............ max of (v avssio - 0.3v) or -14v to min of (v avddio + 0.3v) or +17v (port0 to port11) to agnd (gpi and bidirectional level translator modes) ........ -0.3v to min of (v avdd + 0.3v) or +6v cnvt to dgnd ............. -0.3v to min of (v dvdd + 0.3v) or +6v int to dgnd ........................................................... -0.3v to +6v (sda, scl) to dgnd .............................................. -0.3v to +6v (ad0, ad1) to dgnd .... -0.3v to min of (v dvdd + 0.3v) or +6v dac and adc reference pins to agnd (dac_ref, adc_int_ref,) .......... -0.3v to min of (v avdd +0.3v) or +4v temperature sensor pins (d0n, d0p, d1n, d1p) to agnd .......................... -0.3v to min of (v avdd + 0.3v) or +6v current into any port pin .............................................. 100ma current into any other pin except supplies and ground ..................................................................... 50ma continuous power dissipation (t a = +70c) (multilayer board) tqfn (derate 34.5mw/c above +70c) ............. 2758.6mw operating temperature range .......................... -40oc to +105c storage temperature range ............................. -65oc to +150c lead temperature (soldering, 10s) ................................. +300c soldering temperature (reflow) ....................................... +260c tqfn junction-to-case thermal resistance ( jc ) .............. 1.7c/w junction-to-ambient thermal resistance ( ja ) .......... 29c/w (note 1) adc electrical specifcations (v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) maxim integrated 3 note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to ab solute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics electrical characteristics parameter symbol conditions min typ max units dc accuracy (note 3) resolution 12 bits integral nonlinearity inl 2.5 lsb differential nonlinearity dnl no missing codes over temperature 1 lsb offset error 0.5 8 lsb offset error drift 0.002 lsb/c gain error 11 lsb gain error drift 0.01 lsb/c channel-to-channel offset matching 1 lsb channel-to-channel gain matching 2 lsb MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
adc electrical specifcations (v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) maxim integrated 4 electrical characteristics (continued) parameter symbol conditions min typ max units dynamic performance (single-ended inputs) signal-to-noise plus distortion sinad f s = 400ksps, f in = 10khz 70 db signal to noise snr f s = 400ksps, f in = 10khz 71 db total harmonic distortion thd f s = 400ksps, f in = 10khz -75 db spurious-free dynamic range sfdr f s = 400ksps, f in = 10khz 75 db crosstalk -85 db dynamic performance (differential inputs) signal-to-noise plus distortion sinad f s = 400ksps, f in = 10khz 71 db signal to noise snr f s = 400ksps, f in = 10khz 72 db total harmonic distortion thd f s = 400ksps, f in = 10khz -82 db spurious-free dynamic range sfdr f s = 400ksps, f in = 10khz 82 db crosstalk -85 db conversion rate throughput (note 4) adcconv[1:0] = 00 200 ksps adcconv[1:0] = 01 250 adcconv[1:0] = 10 333 adcconv[1:0] = 11 400 acquisition time t acq adcconv[1:0] = 00 3.5 s adcconv[1:0] = 01 2.5 adcconv[1:0] = 10 1.5 adcconv[1:0] = 11 1.0 analog input (all ports) absolute input voltage (note 5) v port range 1 0 10 v range 2 -5 +5 range 3 -10 0 range 4 0 2.5 input resistance range 1, 2, 3 70 100 130 k range 4 50 75 100 k MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) (v avdd = 5.0v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) maxim integrated 5 ref electrical characteristics gpio electrical specifcations parameter symbol conditions min typ max units adc internal reference reference output voltage internal references at t a = +25c 2.494 2.5 2.506 v ref output tempco (note 6) t c-vref 10 25 ppm/c capacitor bypass at adc_int_ref 4.7 10 f dac internal reference reference output voltage internal references at t a = +25c 2.494 2.5 2.506 v ref output tempco (note 6) t c-vref 10 25 ppm/c capacitor bypass at dac_ref 4.7 10 f dac external reference reference input range 1.25 2.5 v parameter symbol conditions min typ max units gpio except in bidirectional level translation mode programmable input logic threshold v ith 0.3 v dacref v input high voltage v ih v ith + 0.3 v input low voltage v il v ith - 0.3 v hysteresis 30 mv programmable output logic level v olvl 0 4 x v dacref v propagation delay from gpi input to gpo output in unidirectional level translating mode midscale threshold-5v logic swing 2 s bidirectional level translation path and analog switch input high voltage v ih 1 v input low voltage v il 0.2 v on-resistance from v avssio + 2.50v to v avddio - 2.50v 60 propagation delay 10k pullup resistors to rail in each side. midvoltage to midvoltage when driving side goes from high to low 1 s MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 5.0v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) (v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) maxim integrated 6 gpio electrical specifcations (continued) parameter symbol conditions min typ max units analog switch turn-on delay (note 7) 400 ns turn-off delay (note 7) 400 ns on-time duration (note 7) 1 s off-time duration (note 7) 1 s on-resistance from v avssio + 2.50v to v avddio - 2.50v 60 dac electrical specifcations parameter symbol conditions min typ max units dc accuracy resolution n 12 bits output range (note 5) v port range 1 0 +10 v range 2 -5 +5 range 3 -10 0 integral linearity error inl from code 100 to code 3996 0.5 1.5 lsb differential linearity error dnl 0.5 1 lsb offset voltage at code 100 20 lsb offset voltage tempco 15 ppm/c gain error from code 100 to code 3996 -0.6 +0.6 % of fs gain error tempco from code 100 to code 3996 4 ppm of fs/c power-supply rejection ratio psrr 0.4 mv/v dynamic characteristics output voltage slew rate sr 1.6 v/s output settling time to 1 lsb, from 0 to full scale, output load capacitance of 250pf (note 8) 40 s settling time after current- limit condition 6 s noise f = 0.1hz to 300khz 3.8 mv p-p MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 5.0v, v dvdd = 1.62v to 5.50v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) (v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) maxim integrated 7 dac electrical specifcations (continued) interface digital io electrical specifcations parameter symbol conditions min typ max units track-and-hold digital feedthrough 5 nv s hold step (note 6) 1 6 mv droop rate (note 6) 0.3 15 mv/s parameter symbol conditions min typ max units i 2 c io dc specification input logic-high voltage (sda, scl, ad0, ad1, cnvt ) v dvdd = 2.5v to 5.5v 0.7 x v dvdd v v dvdd = 1.62v to 2.5v 0.85 x v dvdd input logic-low voltage (sda, scl, ad0, ad1, cnvt ) v dvdd = 2.5v to 5.5v 0.3 x v dvdd v v dvdd = 1.62v to 2.5v 0.15 x v dvdd input leakage current (sda, scl, ad0, ad1, cnvt ) -10 +10 a input capacitance (sda, scl, ad0, ad1, cnvt ) 10 pf output logic-low voltage (sda) i snk = 3ma 0.4 v output logic-low voltage ( int ) i snk = 5ma, v dvdd = 2.5v to 5.5v 0.4 v i snk = 2ma, v dvdd = 1.62v to 2.5v 0.2 i 2 c timing requirements (fast mode) (see figure 1) serial clock frequency f scl 0 400 khz bus free time between stop and start condition t buf 1.3 s hold time (repeated) start condition t hd;sta after this period, frst clock pulse is generated 0.6 s scl pulse-width low t low 1.3 s scl pulse-width high t high 0.6 s MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) figure 1. i 2 c timing maxim integrated 8 interface digital io electrical specifcations (continued) parameter symbol conditions min typ max units setup time for repeated start condition t su;sta 0.6 s data hold time t hd;dat 0 900 ns data setup time t su;dat 100 ns sda and scl receiving rise time t r (note 6) 12 x ( v dvdd / 5.5v ) 300 ns sda and scl receiving fall time t f (note 6) 12 x ( v dvdd / 5.5v ) 300 ns sda transmitting fall time t of 12 x ( v dvdd / 5.5v ) 250 ns setup time for stop condition t su;sto 0.6 s bus capacitance allowed c b v dvdd = 2.5v to 5.5v 400 pf pulse width of suppressed spike t sp 50 ns sda scl t f s s s r p t low t r t hd;sta t hd;dat t high t su;sta t su;sto t su;dat t f t hd;sta t sp t r t buf MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) maxim integrated 9 electrical characteristics internal and external temperature sensor specifcations power-supply specifcations parameter symbol conditions min typ max units accuracy accuracy of internal sensor (notes 6, 9) 0c t j +80c 0.3 2.0 c -40c t j +125c 0.7 5 c accuracy of external sensor (notes 6, 9) 0c t rj +80c 0.3 2.0 c -40c t rj +150c 1.0 5 c temperature measurement resolution 0.125 c external sensor junction current high 68 a low 4 a external sensor junction current high series resistance cancellation mode 136 a low series resistance cancellation mode 8 a remote junction current conversion ratio 17 d0n/d1n voltage internally generated 0.5 v parameter symbol conditions min typ max units v avdd 4.75 5.25 v v dvdd 1.62 5.50 v v avddio v avdd 15.75 v v avssio -12.0 0 v v avddio to v avssio v avdd 24 v i avdd all ports in high impedance 14 18 ma lpen = 1 11 all ports in adc-related modes 17 all ports in dac-related modes 18 i dvdd serial interface in idle mode 2 a i avddio all ports in mode 0 150 a i avssio all ports in mode 0 -400 a MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
the values of v avddio and v avssio supply voltages depend on the application circuit and the device confguration. v avddio needs to be the maximum of those four values: if one or more ports are in mode 3, 4, 5, 6, or 10 (dac-related modes), v avddio must be set, at minimum, to the value of the largest voltage driven by any of the ports set in those modes. for improved linearity, it is recommended to set v avddio 2.0v above the largest voltage value. if one or more ports are in mode 7, 8, or 9 (adc-related modes), v avddio must be set, at minimum, to the value of the largest voltage applied to any of the ports set in those modes. if one or more ports are in mode 11 or 12 (analog switch-related modes), v avddio must be set, at minimum, to 2.0v above the value of the largest voltage applied to any of the ports functioning as analog switch terminals. v avddio cannot be set lower than v avdd . v avssio needs to be the minimum of those four values: if one or more ports are in mode 3, 4, 5, 6, or 10 (dac-related modes), v avssio must be set, at maximum, to the value of the lowest voltage driven by any of the ports set in those modes. for improved linearity, it is recommended to set v avssio 2.0v below the lowest voltage value. if one or more ports are in mode 7, 8, or 9 (adc-related modes), v avssio must be set, at maximum, to the value of the lowest voltage applied to any of the ports set in those modes. if one or more ports are in mode 11 or 12 (analog switch-related modes), v avssio must be set, at maximum, to 2.0v below the value of the lowest voltage applied to any of the ports functioning as analog switch terminals. v avssio cannot be set higher than v agnd . for example, the MAX11312 can operate with only one voltage supply of 5v (5%) connected to avdd, avddio, and dvdd, and one ground of 0v connected to agnd, dgnd, and avssio. however, the level of performance presented in the electrical specifications requires the setting of the supplies connected to avddio and avssio, as previously described. maxim integrated 10 recommended vddio/vssio supply selection adc range -10v to 0v -5v to +5v 0v to +10v 0 to 2.5v dac range -10v to 0v v avddio = +5v v avssio = -12v v avddio = +5v v avssio = -12v v avddio = +10v v avssio = -12v v avddio = +5v v avssio = -12v -5v to +5v v avddio = +7v v avssio = -10v v avddio = +7v v avssio = -7v v avddio = +10v v avssio = -7v v avddio = +7v v avssio = -7v 0v to +10v v avddio = +12v v avssio = -10v v avddio = +12v v avssio = -5v v avddio = +12v v avssio = -2v v avddio = +12v v avssio = -2v MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
note 2: electrical specifications are production tested at t a = +25c. specifications over the entire operating temperature range are guaranteed by design and characterization. typical specifications are at t a = +25c. note 3: dc accuracy specifications are tested for single-ended adc inputs only. note 4: the effective adc sample rate for port x configured in mode 6, 7, or 8 is: [adc sample rate per adcconv]/(([number of ports in modes 6,7,8] + [1 if tmpsel 000]) x [2 # of samples for port x ]) note 5: see the recommended vddio/vssio supply selection table for each range. for ports in modes 6, 7, 8, or 9, the voltage applied to those ports must be within the limits of their selected input range, whether in single-ended or differential mode. note 6: specification is guaranteed by design and characterization. note 7: switch controlled by gpi-confgured port. one switch terminal connected to 0v, the other terminal connected to 5v through a 5ma current source. timing is measured at the 2.5v transition point. turn-on and turn-off delays are measured from the edge of the control signal to the 2.5v transition point. turn-on and turn-off durations are measured between control signal transitions. note 8: in dac-related modes, the rate, at which pixi ports confgured in mode 1, 3, 4, 5, 6, or 10 are refreshed, is as follows: 1/(40s x [number of ports in modes 1, 3, 4, 5, 6, 10]) note 9: typical (typ) values represent the errors at the extremes of the given temperature range. (v avdd = 4.75v to 5.25v, v dvdd = 3.3v, v avddio = +12.0v, v agnd = v dgnd = 0v, v avssio = -2.0v, v dacref = 2.5v, v adcref = 2.5v (internal), f s = 400ksps, 10v analog input range set to range 1 (0 to +10v). t a = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) maxim integrated 11 common pixi electrical specifcations parameter symbol conditions min typ max units pixi ports input capacitance all pixi ports 12 pf input resistance all pixi input pins except adc mode 50 75 100 k startup time between stable supplies and accessing registers 100 ms high-voltage output driver characteristics maximum output capacitance 250 pf output low voltage, dac mode sinking 25ma, v avssio = 0v, v avddio = 10v v avssio + 1.0 v output high voltage, dac mode sourcing 25ma, v avssio = 0v, v avddio = 10v v avddio - 1.5 v output low voltage, gpo mode sinking 2ma, v avssio = 0v, v avddio = 10v v avssio + 0.4 v output high voltage, gpo mode sourcing 2ma, v avssio = 0v, v avddio = 10v v avddio - 0.4 v current limit short to avddio 75 ma short to avssio 75 ma MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) maxim integrated 12 typical operating characteristics -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1000 2000 3000 4000 dnl (lsb) digital ouput code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v adc differential nonlinearity vs. digital output code internal reference toc02 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 0 1000 2000 3000 4000 inl (lsb) digital ouput code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v adc integral nonlinearity vs. digital output code internal reference toc01 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1000 2000 3000 4000 dnl (lsb) digital ouput code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v adc differential nonlinearity vs. digital output code external reference toc04 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125 offset error (lsb) temperature ( c) range 0v to 10v range -5v to +5v range -10v to 0v range 0v to 2.5v adc offset error vs. temperature toc05 0 1 2 3 4 5 6 7 8 -50 -25 0 25 50 75 100 125 gain error (lsb) temperature ( c) range 0v to 10v range -5v to +5v range -10v to 0v range 0v to 2.5v adc gain error vs. temperature toc06 8 9 10 11 12 13 14 15 16 17 18 4.7 4.8 4.9 5 5.1 5.2 5.3 offset error (lsb) supply voltage (v) range 0v to 10v range -5v to +5v range -10v to 0v range 0v to 2.5v adc offset error vs. supply voltage toc07 0 1 2 3 4 5 6 7 4.7 4.8 4.9 5 5.1 5.2 5.3 gain error (lsb) supply voltage (v) range 0v to 10v range -5v to +5v range -10v to 0v range 0v to 2.5v adc gain error vs. supply voltage toc08 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature adc range 0v to 10v i avdd toc9a i avssio i avddio i avddio -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 2.5 0 1000 2000 3000 4000 inl (lsb) digital ouput code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v adc integral nonlinearity vs. digital output code external reference toc03 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) maxim integrated 13 typical operating characteristics (continued) 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature adc range - 5v to +5v i avdd toc9b i avssio i avddio i avddio 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature adc range - 10v to 0v i avdd toc9c i avssio i avddio i avddio 14 14.2 14.4 14.6 14.8 15 15.2 15.4 15.6 15.8 16 0 2 4 6 8 10 12 i avdd current (ma) no. of adc configured ports i avdd vs. adc channels adc range 0v to 10v toc10 adc range - 5v to +5v adc range - 10v to 0v 2.494 2.496 2.498 2.500 2.502 2.504 2.506 -50 -25 0 25 50 75 100 125 reference voltage (v) temperature ( c) adc internal reference vs. temperature toc11 -1.5 -1 -0.5 0 0.5 1 1.5 0 1000 2000 3000 4000 inl (lsb) dac code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v dac integral nonlinearity vs. digital code internal reference toc12 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1000 2000 3000 4000 dnl (lsb) dac code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v dac differential nonlinearity vs. digital output code internal reference toc13 -1.5 -1 -0.5 0 0.5 1 1.5 0 1000 2000 3000 4000 inl (lsb) dac code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v dac integral nonlinearity vs. digital code external reference toc14 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 0 1000 2000 3000 4000 dnl (lsb) dac code (decimal) range 0v to 10v range -5v to +5v range -10v to 0v dac differential nonlinearity vs. digital output code external reference toc15 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 -50 -25 0 25 50 75 100 125 offset error (lsb) temperature ( c) range 0v to 10v range -5v to +5v range -10v to 0v dac offset error vs. temperature toc16 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) maxim integrated 14 typical operating characteristics (continued) -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 -50 -25 0 25 50 75 100 125 gain error (lsb) temperature ( c) range 0v to 10v range -5v to +5v range -10v to 0v dac gain error vs. temperature toc17 -2 -1 0 1 2 3 4 4.7 4.8 4.9 5 5.1 5.2 5.3 offset error (lsb) supply voltage (v) range 0v to 10v range -5v to +5v range -10v to 0v dac offset error vs. supply voltage toc18 -1.5 -1.3 -1.1 -0.9 -0.7 -0.5 -0.3 -0.1 4.7 4.8 4.9 5 5.1 5.2 5.3 gain error (lsb) supply voltage (v) range 0v to 10v range -5v to +5v range -10v to 0v dac gain error vs. supply voltage toc19 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature dac range 0v to 10v i avdd toc20a i avssio i avddio i avddio 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature dac range - 5v to +5v i avdd toc20b i avssio i avddio i avddio 0.1 1 10 100 1000 10000 100000 -50 -25 0 25 50 75 100 125 supply current (a) temperature ( c) supply current vs. temperature dac range - 10v to 0v i avdd toc20c i avssio i avddio i avddio 13 14 15 16 17 18 19 0 2 4 6 8 10 12 i avdd current (ma) no. of dac - configured ports i avdd vs. dac channels adc range 0v to 10v toc21a adc range - 5v to +5v adc range - 10v to 0v 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 2 4 6 8 10 12 i avddio current (ma) no. of dac - configured ports i avddio vs. dac channels adc range 0v to 10v toc21b adc range - 5v to +5v adc range - 10v to 0v 0 1 2 3 4 5 6 7 0 2 4 6 8 10 12 i avssio current (ma) no. of dac - configured ports i avssio vs. dac channels adc range 0v to 10v toc21c adc range - 5v to +5v adc range - 10v to 0v MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) maxim integrated 15 typical operating characteristics (continued) 2v/div toc24b 2.5s/div dac settling time change from max to min no load 2v/div toc24c 50s/div dac settling time change from min to max 1f cap load 2v/div toc24d 50s/div dac settling time change from max to min 1f cap load 0.00 0.05 0.10 0.15 0.20 0.25 0.30 -50 -25 0 25 50 75 100 125 droop rate (mv/s) temperature ( c) avdd = 4.75v avdd = 5v avdd = 5.25v dac droop rate vs. temperature (dac range 0 to 10v) toc25a 0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 -50 -25 0 25 50 75 100 125 droop rate (mv/s) temperature ( c) avdd = 4.75v avdd = 5v avdd = 5.25v dac droop rate vs. temperature (dac range - 5v to +5v) toc25b v avdd = 4.75v v avdd = 5v v avdd = 5.25v 2.494 2.496 2.498 2.500 2.502 2.504 2.506 -50 -25 0 25 50 75 100 125 reference voltage (v) temperature ( c) dac internal reference vs. temperature toc22 2v/div toc23 5s/div dac settling time change from psv1 to psv2 psv1 = 0x000 psv2 = 0xfff 2v/div toc24a 2.5s/div dac settling time change from min to max no load MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) maxim integrated 16 typical operating characteristics (continued) -0.40 -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 -50 -25 0 25 50 75 100 125 droop rate (mv/s) temperature ( c) avdd = 4.75v avdd = 5v avdd = 5.25v dac droop rate vs. temperature (dac range - 10v to 0) toc25c v avdd = 4.75v v avdd = 5v v avdd = 5.25v 0.000 0.100 0.200 0.300 0.400 0.500 0.600 0.700 0.800 0.900 1.000 -50 -25 0 25 50 75 100 125 voltage (v) temperature ( c) dac v oh and v ol vs. temperature (i load = 25ma) toc26 v oh v ol 60.0 60.2 60.4 60.6 60.8 61.0 61.2 61.4 61.6 61.8 62.0 -50 -25 0 25 50 75 100 125 current (ma) temperature ( c) dac drive current limit vs. temperature dac = 0v, shorted to v ddio toc27 60.0 60.2 60.4 60.6 60.8 61.0 61.2 61.4 61.6 61.8 62.0 -50 -25 0 25 50 75 100 125 current (ma) temperature ( c) dac drive current limit vs. temperature dac = 10v, shorted to v ssio toc28 cs 5v/div toc29 10s/div major - code transition glitch dac code from 0x7ff to 0x800 dac v out ac - coupled 1mv/div 20v/div toc30 1s/div dac output noise internal reference (0.1hz to 10hz) 20v/div toc31 1s/div dac output noise external reference (0.1hz to 10hz) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 4.7 4.8 4.9 5 5.1 5.2 5.3 offset (mv) supply voltage (v) vth = 0.9v vth = 1.65v vth = 2.5v gpi offset vs. supply voltage toc32 v th = 0.9v v th = 1.65v v th = 2.5v MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
(t a = +25c, unless otherwise noted.) maxim integrated 17 typical operating characteristics (continued) 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 offset (mv) temperature ( c) vth = 0.9v vth = 1.65v vth = 2.5v gpi offset vs. temperature toc33 v th = 0.9v v th = 1.65v v th = 2.5v -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 -50 -25 0 25 50 75 100 125 temperature error ( c) temperature ( c) internal temperature sensor error vs. temperature toc35 20 22 24 26 28 30 32 34 36 38 40 -50 -25 0 25 50 75 100 125 hysteresis ( mv) temperature ( c) vth = 0.9v vth = 1.65v vth = 2.5v gpi hysteresis vs. temperature toc34 v th = 0.9v v th = 1.65v v th = 2.5v -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -50 -25 0 25 50 75 100 125 temperature error ( c) temperature ( c) external temperature sensor error vs. temperature toc36 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
maxim integrated 18 pin confguration pin description max 11312 tqfn 5 mm x 5 mm top view sda ad 0 ad 1 int cnvt dvdd avssio port 4 port 3 port 6 port 2 avddio port 8 port 9 port 10 port 0 agnd avdd d 0 n scl port 5 port 11 d 0 p dgnd dac _ ref + avddio d 1 p agnd 1 d 1 n adc _ int _ ref port 1 port 7 16 15 14 13 12 11 10 9 17 18 19 20 21 22 23 24 26 25 27 28 29 30 31 32 8 7 6 5 4 3 2 1 pin name function 1 dvdd positive digital supply 2 sda serial interface input and output 3 scl serial interface clock input 4 ad0 slave address bit 0 5 ad1 slave address bit 1 6 int interrupt open-drain output. active-low. 7 cnvt adc trigger control input. active-low. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
maxim integrated 19 pin description (continued) pin name function 8 adc_int_ref adc internal voltage reference output. connect a bypass capacitor at this pin (4.7f to 10f). 9 dac_ref dac external/internal voltage reference input. connect a bypass capacitor at this pin (4.7f to 10f). 10 d0p 1 st external temperature sensor positive input 11 d0n 1 st external temperature sensor negative input 12 avdd positive analog supply 13 agnd analog ground 14 port0 confgurable mixed-signal port 0 15 d1p 2 nd external temperature sensor positive input 16 d1n 2 nd external temperature sensor negative input 17 port1 confgurable mixed-signal port 1 18,27 avddio analog positive supply for mixed-signal ports. connect both pins to avddio. 19 port2 confgurable mixed-signal port 2 20 port3 confgurable mixed-signal port 3 21 port4 confgurable mixed-signal port 4 22 port5 confgurable mixed-signal port 5 23 avssio analog negative supply for mixed-signal ports. 24 port6 confgurable mixed-signal port 6 25 port7 confgurable mixed-signal port 7 26 agnd1 analog ground 28 port8 confgurable mixed-signal port 8 29 port9 confgurable mixed-signal port 9 30 port10 confgurable mixed-signal port 10 31 port11 confgurable mixed-signal port 11 32 dgnd digital ground ep exposed pad. connect ep to avssio. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
maxim integrated 20 control and monitoring application circuitpa biasingpixi solution r s thermal probe cooling fan max 44285 4 C 20 ma r load heater scl _ 5 v scl _ 3 v 3 sda _ 5 v sda _ 3 v 3 4 - 20 ma output 0 v to + 10 v dac adc adc csa speed controller adc dac temperature sensor and monitor current regulation dac 10 v r s csa max 44285 current sense adc voltage sense adc max 11312 thermal control miniqusb spi usb pc level translator MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
detailed description functional overview the MAX11312 has 12 configurable mixed-signal i/o ports. each port is independently configured as a dac output, an adc, a gpi input, a gpo, or an analog switch terminal. user-controllable parameters are available for each of those configurations. the device offers one internal and two external temperature sensors. the serial interface operates as a fast mode i 2 c-compatible interface. the dac is used to drive out a voltage defined by the dac data register of the dac-configured ports. the dac uses either an internal or external voltage reference. the selection of the voltage reference is set for all the ports and cannot be configured on a port-by-port basis. the adc converts voltages applied to the adc-configured ports. the adc can operate in single-ended mode or in differential mode, by which any two ports can form a differential pair. the port configured as the negative input of the adc can be used by more than one differential adc input pairs. the adc uses an internal voltage reference. in some configurations, the adc uses the dac voltage reference. the adc voltage reference selection can be configured on a port-by-port basis. interrupts provide the host with the occurrence of user- selected events through the configuration of an interrupt mask register. adc operations the adc is a 12-bit, low-power, successive approximation analog-to-digital converter, capable of sampling a single input at up to 400ksps. the adcs conversion rate can be programmed to 400ksps, 333ksps, 250ksps, or 200ksps. the default conversion rate setting is 200ksps. each adc-configured port can be programmed for one of five input voltage ranges: 0 to +10v, -5v to +5v, -10v to 0v, and 0 to +2.5v. the adc uses the internal adc 2.5v voltage reference or in some cases, the dac voltage reference. the voltage reference can be selected on a port-by-port basis. adc control the adc can be triggered using an external signal cnvt or from a control bit. cnvt is active-low and must remain low for a minimal duration of 0.5s to trigger a conversion. four configurations are available: idle mode (default setting). single sweep mode. the adc sweeps sequentially the adc-configured ports, from the lowest index port to the highest index port, once cnvt is asserted. single conversion mode. the adc performs a single conversion at the current port in the series of adc- configured ports when cnvt is asserted. continuous sweep mode. the adc continuously sweeps the adc-configured ports. the cnvt port has no effect in this mode. adc averaging function adc-configured ports can be configured to average blocks of 2, 4, 8, 16, 32, 64, or 128 conversion results. the corresponding adc data register is updated only when the averaging is completed, thus decreasing the throughput proportionally. if the number of samples to average is modified for a given port, the content of the adc data register for that port is cleared before starting to average the new block of samples. adc mode change when users change the adc active mode (continuous sweep, single sweep, or single conversion), the adc data registers are reset. however, adc data registers retain content when the adc is changed to idle mode. adc confgurations the adc can operate in single-ended, differential, or pseudo-differential mode. in single-ended mode, the pixi port is the positive input to the adc while the negative input is grounded internally ( figure 2 ). in differential mode ( figure 3 ), any pair of pixi ports can be configured as inputs to the differential adc. in pseudo-differential mode ( figure 4 ), one pixi port produces the voltage applied to the negative input of the adc, while another pixi port forms the positive input. the adc data format is straight binary in single-ended mode, and twos complement in differential and pseudo- differential modes. maxim integrated 21 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
dac operations the MAX11312 uses a 12-bit dac, which operates at the rate of 40s per port. since up to 12 ports can be configured in dac-related modes, the minimum refresh rate per port is 2.083khz. no external component is required to set the offset and gain of the dac drivers. the pixi port driver features a wide output voltage range of 10v and high-current capability with dedicated power supplies (avddio, avssio). the dac uses either the internal or external voltage reference. unlike the adc, the dac voltage reference cannot be configured on a port-by-port basis. dac mode configuration is illustrated in figure 5 . dac operations can be monitored by the adc. in such a mode, the adc samples the dac-configured port to allow the host to monitor that the voltage at the port is within expectations given the accuracy of the adc and dac. this adc monitoring mode is shown in figure 6 . by default, the dac updates the dac-configured ports sequentially. however, users can configure the dac so that its sequence can jump to update the port that just received new data to convert. after having updated this port, the dac continues its default sequence from that port. in that mode, users should allow a minimum of 80s between dac data register updates for subsequent jump operations. in addition to port-specific dac data registers, the host can also use the same data for all dac-related ports using one of two preset dac data registers. all dac output drivers are protected by overcurrent limit circuitry. in case of overcurrent, the MAX11312 generates an interrupt. detailed status registers are offered to the host to determine which ports are current limited. figure 2. adc with single-ended input figure 3. adc with differential inputs maxim integrated 22 adc i 2 c serial interface port 12 bits up to 400 ksps scaling block adc _ int _ ref int sequencer cnvt digital core adc i 2 c serial interface any port 12 bits up to 400 ksps scaling block any other port scaling block sequencer adc _ int _ ref cnvt digital core int MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
general-purpose input and output each pixi port can be configured as a gpi or a gpo. the gpi threshold is adjusted by setting the dac data register of that gpi port to the corresponding voltage. if the dac data register is set at 0x0fff, the gpi threshold is the dac reference voltage. the amplitude of the input signal must be contained within 0v to v avdd . the gpi-configured port can be set to detect rising edges, falling edges, either rising or falling edges, or none. when a port is configured as gpo ( figure 8 ), the amplitude of its logic-one level is set by its dac data register. if the dac data register is set at 0x0fff, the gpo logic-one level is four times the dac reference voltage. the logic- zero level is always 0v. the host can set the logic state of gpo-configured ports through the corresponding gpo data registers. unidirectional and bidirectional level translator operations by combining gpi and gpo-configured ports, unidirectional level translator paths can be formed. the signaling at the input of the path can be different from the signaling at the end ( figure 9 ). for example, a unidirectional path could convert a signal from 1.8v logic level to 3.3v logic level. figure 4. adc with pseudo-differential input set by dac figure 5. dac configuration maxim integrated 23 adc i 2 c serial interface any port scaling block reference mux any other port scaling block sequencer dac dac _ ref internal or external for all ports scaling block sequencer adc _ int _ ref adc _ ext _ ref int cnvt digital core i 2 c serial interface digital core sequencer scaling block port 40 s to 1 lsb dac _ ref internal or external for all ports dac 0 m a 25 m a current limit at 50 m a int MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
the unidirectional path configuration allows for the transmission of signals received on a gpi-configured port to one or more gpo-configured ports. pairs of adjacent pixi ports can also form bidirectional level translator paths that are targeted to operate with open-drain drivers ( figure 10 ). in this configuration, adjacent pixi ports must be from the same six-channel group: port0 to port5 or port6 to port11. when used as a bidirectional level translator, the pair of pixi ports must be accompanied with external pullup resistors to meet proper logic levels. internally or externally controlled analog switch operation two adjacent pixi ports from the same group of ports (port0 to port5 or port6 to port11) can form a 60 analog switch that is controlled by two different configurations. analog switches cannot be configured between programmable ports in different groups, such as between port5 and port6 or between port0 and port11. in one configuration, the switch is dynamically controlled by any other gpi-configured pixi port, as illustrated in figure 11 . the signal applied to that gpi-configured port can be inverted. in the other configuration, the switch is programmed to be permanently on by configuring the corresponding pixi port. to turn the switch off, the host must set that pixi port in high-impedance configuration. power-supply brownout detection the MAX11312 features a brownout detection circuit that monitors avddio and avdd pins. when avddio goes below approximately 4.0v, an interrupt is registered, and the interrupt port is asserted if not masked. when avdd goes below approximately 4.0v, the device resets. i 2 c operations the MAX11312 serial interface is compatible with the i 2 c fast mode (scl at 400khz). the MAX11312 has a configurable 7-bit slave address. the first four bits of all MAX11312 slave addresses are always 0111. slave address bits a2, a1, and a0 are shown in table 1 . the ad0 and ad1 inputs are connected to any of three signals: dgnd, dvdd, sda, or scl giving eight possible slave addresses, and allowing up to eight MAX11312 devices to share the bus. basic write and read transactions are structured as shown in table 2 and table 3 , respectively. for write transactions, the targeted register content is modified only after the third byte has been fully received. a burst transaction would simply be the extension of the single register transaction, where the address is automatically incremented from one data word to the next ( table 4 and table 5 ). each time a new data sample is read or written, the register address is incremented by one until it reaches the last register figure 6. dac configuration with adc monitoring maxim integrated 24 i 2 c serial interface digital core sequencer scaling block port adc reference mux scaling block sequencer dac _ ref internal or external for all ports adc _ int _ ref dac _ ref dac int cnvt MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
table 1. MAX11312 slave addresses table 2. single register i 2 c write transaction format table 3. single register i 2 c read transaction format maxim integrated 25 pin ad1 pin ad0 slave address a6 a5 a4 a3 a2 a1 a0 dgnd dgnd 0 1 1 1 0 0 0 dgnd sda 0 1 1 1 0 0 1 dgnd scl 0 1 1 1 0 1 0 dgnd dvdd 0 1 1 1 0 1 1 dvdd dgnd 0 1 1 1 1 0 0 dvdd sda 0 1 1 1 1 0 1 dvdd scl 0 1 1 1 1 1 0 dvdd dvdd 0 1 1 1 1 1 1 b7 b6 b5 b4 b3 b2 b1 b0 n/ack start 1 st byte 7-bit slave address[6:0] r/wb ack 2 nd byte 0 address[6:0] ack 3 rd byte data[15:8] ack 4 th byte data[7:0] ack stop b7 b6 b5 b4 b3 b2 b1 b0 n/ack start 1 st byte 7-bit slave address[6:0] r/wb ack 2 nd byte 0 address[6:0] ack restart 1 st byte 7-bit slave address[6:0] r/wb ack 3 rd byte data[15:8] ack 4 th byte data[7:0] nack (from host) stop MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
table 4. multiple register i 2 c write transaction format table 5. multiple register i 2 c read transaction format maxim integrated 26 b7 b6 b5 b4 b3 b2 b1 b0 n/ack start 1 st byte 7-bit slave address[6:0] r/wb ack 2 nd byte 0 address_n[6:0] ack 3 rd byte data_n[15:8] ack 4 th byte data_n[7:0] ack 5 th byte data_n+1[15:8] ack 6 th byte data_n+1[7:0] ack 7 th byte data_n+2[15:8] ack 8 th byte data_n+2[7:0] ack 9 th byte data_n+3[15:8] ack 10 th byte data_n+3[7:0] ack 11 th byte ack 25 th byte data_n+11[15:8] ack 26 th byte data_n+11[7:0] ack stop b7 b6 b5 b4 b3 b2 b1 b0 n/ack start 1 st byte 7-bit slave address[6:0] r/wb ack 2 nd byte 0 address_n[6:0] ack restart 1 st byte 7-bit slave address[6:0] r/wb ack 3 rd byte data_n[15:8] ack 4 th byte data_n[7:0] ack 5 th byte data_n+1[7:0] ack 6 th byte data_n+1[15:8] ack 7 th byte data_n+1[7:0] ack 8 th byte data_n+2[15:8] ack 9 th byte data_n+2[7:0] ack 10 th byte data_n+3[15:8] ack 11 th byte data_n+3[7:0] ack 25 th byte data_n+11[15:8] ack 26 th byte data_n+11[7:0] nack (from host) stop MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
address. the restart shown in tables 3 and 5 could be replaced by a stop followed by a start. if a transaction targets an unused address, nothing is written within the MAX11312 for write transactions, and all zeros are read back for read transactions. similarly, if a write transaction targets a read-only register, nothing is written to the device. burst transaction address incrementing modes with a burst transaction, the address of the initial register is entered once. the data of the targeted register can then be written or read. if the serial clock keeps running without issuing restart, the device increments the address pointer and writes or reads the next data after the next figure 7. gpi mode figure 8. gpo mode maxim integrated 27 dac i 2 c serial interface port 30 mv hysteresis sequencer dac _ ref internal or external for all ports digital core int gpi i 2 c serial interface gpo scaling block dac digital core port current limit at 50 m a sequencer dac _ ref internal or external for all ports int MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
two bytes. this scheme goes on until the host produces a nack (read transactions) or a stop (write transactions). there are two address incrementing modes. in one mode, the address is simply incremented by one (default mode), while in the other, the address is incremented contextually. when writing dac data registers in a burst fashion using contextual addressing, the host would write the address of the first port that is dac-configured (starting from the lowest port index). as long as the host does not issue a stop and another two bytes are received, the next dac- configured port is written. this scheme continues until the last dac-configured port is reached. at that point, any additional serial clock cycle results in looping back to the first dac-configured port. the contextual addressing scheme is only valid for writing dac data registers, as described above, and reading adc data registers. interrupt operations the device issues interrupts to alert the host of various events. all events are recorded by the interrupt register. the assertion of an interrupt register bit results in the assertion of the interrupt port ( int ) if that interrupt bit is figure 9. unidirectional level translator path mode figure 10. bidirectional level translation application diagram maxim integrated 28 gpo scaling block any other port gpi any port sequencer sequencer i 2 c serial interface digital core dac dac dac_ref internal or external for all ports int logic controller chip 1 with vdd 1 logic level v dd 1 port [ i ] port [ i + 1 ] v dd 2 logic controller chip 2 with vdd 2 logic level max 11312 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
not masked. by default, all interrupts are masked upon power-up or reset. the interrupts are listed hereafter. the adcflag (adc flag) interrupt indicates that the adc just completed a conversion or set of conversions. it is asserted either at the end of a conversion when the adc is in single-conversion mode or at the end of a sweep when the adc is either in single-sweep mode or continuous-sweep mode. adcflag is cleared when the interrupt register is read. the adcdr (adc data ready) interrupt is asserted when at least one adc data register is refreshed. since one conversion per adc-configured port is performed per sweep, many sweeps may be required before refreshing the data register of a given adc-configured port that utilizes the averaging function. (see the adc averaging function section) to determine which adc-configured port received a new data sample, the host must read the adc status registers. adcdr is cleared after the interrupt register and both adc status registers are read subsequently. the adcdm (adc data missed) interrupt is asserted when any adc data register is not read by the host before new data is stored in that adc data register. adcdm is cleared after the interrupt register is read. the gpier (gpi event received) interrupt indicates that an event has been received on one of the gpi-configured ports. each gpi port can be configured to generate an interrupt for an event such as detecting a rising edge, a falling edge, or either edge at the corresponding port. if the gpi port is configured to detect no edge, it is equivalent to masking the interrupt related to that port. a gpi status register allows the host to identify which port detected the event. gpier is cleared after the interrupt register and both gpi status registers are read subsequently. the gpiem (gpi event missed) interrupt informs the host that it did not service the gpi interrupt caused by the occurrence of an event recorded by gpi status registers before another event was received on the same port. the host must read the interrupt register and the gpi status registers whenever a gpi event received interrupt occurs; otherwise, the gpiem register is asserted upon receiving the next event. this interrupt must be used in conjunction with the gpier interrupt bit to operate properly. gpiem is cleared after the interrupt register and both gpi status registers are read subsequently. the dacoi (dac overcurrent) interrupt indicates that a dac-configured port current exceeded approximately 50ma. this limit is not configurable. a dac overcurrent status register allows the host to identify which dac- configured port exceeded the 50ma current limit. dacoi is cleared after the interrupt register is read, and both dac overcurrent status registers are read subsequently. the tmpint[2:0] (internal temperature monitor) interrupt has three sources of interrupt, each independently controllable: a new internal temperature data is ready, the internal temperature value exceeds the maximum limit, or the internal temperature value is below the minimum limit. tmpint is cleared after the interrupt register is read. the tmpext1[2:0] (1st external temperature monitor) interrupt has three sources of interrupt, each independently controllable: a new first external temperature data is ready, the first external temperature value exceeds the maximum limit, or the first external temperature value is below the minimum limit. tmpext1 is cleared after the interrupt register is read. the tmpext2[2:0] (2nd external temperature monitor) interrupt has three sources of interrupt, each independently controllable: a new second external temperature data is ready, the second external temperature value exceeds the maximum limit, or the second external temperature value is below the minimum limit. tmpext2 is cleared after the interrupt register is read. the v mon (high-voltage supply monitor) supply voltage failure) interrupt is triggered when avddio supply voltage falls below 4v, approximately. v mon is cleared after the interrupt register is read. figure 11. pixi ports as a controllable analog switch maxim integrated 29 gpi any other port pixi port [ i + 1 ] pixi port [ i ] MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
temperature sensors overview the device integrates one internal and two external temperature sensors. the external sensors are diode- connected transistors, typically a low-cost, easily mounted 2n3904 npn type, that replace conventional thermistors or thermocouples. the external sensors accuracy is typically 1c over the -40c to +150c temperature range with no calibration necessary. use of a transistor with a different ideality factor produces a proportionate difference in the absolute measured temperature. parasitic series resistance results in a temperature reading error of about 0.25c per ohm of resistance. the MAX11312 features a series resistance cancellation mode (rs_cancel) that eliminates this error for resistances up to 10. the external sensors can also measure the die temperature of other ics, such as microprocessors, that contain a substrate-connected diode available for temperature-sensing purposes. temperature data can be read from the temperature data registers. the temperature data format is in twos complement, with one lsb representing 0.125c. maxim integrated 30 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
register description register bits that are shown unused do not impact device functionality and read out as 0. register bits that are shown as reserved cannot be written by a value different from their default value. writing a different value to those bits may affect the functionality of the device. table 6. register table (read/write) maxim integrated 31 address description b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 default 0x00 (r) device id devid[15:0] 0x1424 0x01 (r) interrupt vmon tmpext2[2:0] tmpext1[2:0] tmpint[2:0] dacoi gpidm gpidr adcdm adcdr adcflag 0x0000 0x02 (r) adc data status; ports 0-10 adcst[10:6] reserved reserved reserved adcst[5:0] reserved reserved 0x0000 0x03 (r) adc data status; port 11 unused reserved reserved reserved adcst [11] 0x0000 0x04 (r) overcurrent status; ports 0-10 dacoist[10:6] reserved reserved reserved dacoist[5:0] reserved reserved 0x0000 0x05 (r) overcurrent status; port 11 unused reserved reserved reserved dacoist [11] 0x0000 0x06 (r) gpi status; ports 0-10 gpist[10:6] reserved reserved reserved gpist[5:0] reserved reserved 0x0000 0x07 (r) gpi status; port 11 unused reserved reserved reserved gpist[11] 0x0000 0x08 (r) internal temperature data unused tmpintdat[11:0] 0x0000 0x09 (r) 1 st external temperature data unused tmpext1dat[11:0] 0x0000 0x0a (r) 2 nd external temperature data unused tmpext2dat[11:0] 0x0000 0x0b (r) gpi data; ports 10-0 gpidat[10:6] reserved reserved reserved gpidat[5:0] reserved reserved 0x0000 0x0c (r) gpi data; port 11 unused reserved reserved reserved gpidat [11] 0x0000 0x0d (r/w) gpo data; ports 10-0 gpodat[10:6] reserved reserved reserved gpodat[5:0] reserved reserved 0x0000 0x0e (r/w) gpo data; port 11 unused reserved reserved reserved gpodat [11] 0x0000 0x10 (r/w) device control reset brst lpen rs_ cancel tmpper tmpctl[2:0] ths hdn dac ref adcconv[1:0] dacctl[1:0] adcctl[1:0] 0x0000 0x11 (r/w) interrupt mask vmon msk tmpext2 msk[2:0] tmpext1 msk[2:0] tmpint msk[2:0] dacoi msk gpid mmsk gpidr msk adcdm msk adcdr msk adcflag msk 0xffff 0x12 (r/w) gpi irq mode; ports 0C5 gpimd_5[1:0] gpimd_4[1:0] gpimd_3[1:0] gpimd_2[1:0] gpimd_1[1:0] gpimd_0[1:0] reserved reserved 0x0000 0x13 (r/w) gpi irq mode; ports 10C6 gpimd_10[1:0] gpimd_9[1:0] gpimd_8[1:0] gpimd_7[1:0] gpimd_6[1:0] reserved reserved reserved 0x0000 0x14 (r/w) gpi irq mode; port 11 unused reserved reserved reserved gpimd_11[1:0] 0x0000 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
table 6. register table (read/write) (continued) maxim integrated 32 address description b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 default 0x16 (r/w) dac preset data #1 unused dacprstdat1[11:0] 0x0000 0x17 (r/w) dac preset data #2 unused dacprstdat2[11:0] 0x0000 0x18 (r/w) temperature monitor confguration unused tmpext2 moncfg [1:0] tmpext1 moncfg [1:0] tmpint moncfg [1:0] 0x0000 0x19 (r/w) internal temperature high threshold unused tmpinthi[11:0] 0x07ff 0x1a (r/w) internal temperature low threshold unused tmpintlo[11:0] 0x0800 0x1b (r/w) 1 st external temperature high threshold unused tmpext1hi[11:0] 0x07ff 0x1c (r/w) 1 st external temperature low threshold unused tmpext1lo[11:0] 0x0800 0x1d (r/w) 2 nd external temperature high threshold unused tmpext2hi[11:0] 0x07ff 0x1e (r/w) 2 nd external temperature low threshold unused tmpext2lo[11:0] 0x0800 0x20 (r/w) reserved reserved reserved 0x21 (r/w) reserved reserved reserved 0x22 (r/w) port 0 confguration funcid_0[3:0] funcprm_0[11:0] 0x0000 0x23 (r/w) port 1 confguration funcid_1[3:0] funcprm_1[11:0] 0x0000 0x24 (r/w) port 2 confguration funcid_2[3:0] funcprm_2[11:0] 0x0000 0x25 (r/w) port 3 confguration funcid_3[3:0] funcprm_3[11:0] 0x0000 0x26 (r/w) port 4 confguration funcid_4[3:0] funcprm_4[11:0] 0x0000 0x27 (r/w) port 5 confguration funcid_5[3:0] funcprm_5[11:0] 0x0000 0x28 (r/w) reserved reserved reserved 0x29 (r/w) reserved reserved reserved 0x2a (r/w) reserved reserved reserved MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
table 6. register table (read/write) (continued) maxim integrated 33 address description b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 default 0x2b (r/w) port 6 confguration funcid_6[3:0] funcprm_6[11:0] 0x0000 0x2c (r/w) port 7 confguration funcid_7[3:0] funcprm_7[11:0] 0x0000 0x2d (r/w) port 8 confguration funcid_8[3:0] funcprm_8[11:0] 0x0000 0x2e (r/w) port 9 confguration funcid_9[3:0] funcprm_9[11:0] 0x0000 0x2f (r/w) port 10 confguration funcid_10[3:0] funcprm_10[11:0] 0x0000 0x30 (r/w) port 11 confguration funcid_11[3:0] funcprm_11[11:0] 0x0000 0x31 (r/w) reserved reserved reserved 0x32 (r/w) reserved reserved reserved 0x33 (r/w) reserved reserved reserved 0x40 (r) reserved unused reserved 0x41 (r) reserved unused reserved 0x42 (r) port 0 adc data unused adcdat_0[11:0] 0x0000 0x43 (r) port 1 adc data unused adcdat_1[11:0] 0x0000 0x44 (r) port 2 adc data unused adcdat_2[11:0] 0x0000 0x45 (r) port 3 adc data unused adcdat_3[11:0] 0x0000 0x46 (r) port 4 adc data unused adcdat_4[11:0] 0x0000 0x47 (r) port 5 adc data unused adcdat_5[11:0] 0x0000 0x48 (r) reserved unused reserved 0x49 (r) reserved unused reserved 0x4a (r) reserved unused reserved 0x4b (r) port 6 adc data unused adcdat_6[11:0] 0x0000 0x4c (r) port 7 adc data unused adcdat_7[11:0] 0x0000 0x4d (r) port 8 adc data unused adcdat_8[11:0] 0x0000 0x4e (r) port 9 adc data unused adcdat_9[11:0] 0x0000 0x4f (r) port 10 adc data unused adcdat_10[11:0] 0x0000 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
table 6. register table (read/write) (continued) maxim integrated 34 address description b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 default 0x50 (r) port 11 adc data unused adcdat_11[11:0] 0x0000 0x51 (r) reserved unused reserved 0x52 (r) reserved unused reserved 0x53 (r) reserved unused reserved 0x60 (r/w) reserved unused reserved 0x61 (r/w) reserved unused reserved 0x62 (r/w) port 0 dac data unused dacdat_0[11:0] 0x0000 0x63 (r/w) port 1 dac data unused dacdat_1[11:0] 0x0000 0x64 (r/w) port 2 dac data unused dacdat_2[11:0] 0x0000 0x65 (r/w) port 3 dac data unused dacdat_3[11:0] 0x0000 0x66 (r/w) port 4 dac data unused dacdat_4[11:0] 0x0000 0x67 (r/w) port 5 dac data unused dacdat_5[11:0] 0x0000 0x68 (r/w) reserved unused reserved 0x69 (r/w) reserved unused reserved 0x6a (r/w) reserved unused reserved 0x6b (r/w) port 6 dac data unused dacdat_6[11:0] 0x0000 0x6c (r/w) port 7 dac data unused dacdat_7[11:0] 0x0000 0x6d (r/w) port 8 dac data unused dacdat_8[11:0] 0x0000 0x6e (r/w) port 9 dac data unused dacdat_9[11:0] 0x0000 0x6f (r/w) port 10 dac data unused dacdat_10[11:0] 0x0000 0x70 (r/w) port 11 dac data unused dacdat_11[11:0] 0x0000 0x71 (r/w) reserved unused reserved 0x72 (r/w) reserved unused reserved 0x73 (r/w) reserved unused reserved MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
register detailed description device id register (read) interrupt register (read) maxim integrated 35 bit field name description 15:0 devid[15:0] device id 0001_0100_0010_0100 bit field name description 0 adcflag adc fag interrupt ? asserted when the adc completes a conversion (adc set in single-conversion mode) or when the adc completes a sweep (adc set in single-sweep or continuous-sweep mode). ? no interrupt is generated when the adc is in idle mode. ? cleared after the interrupt register is read. 1 adcdr adc data ready interrupt ? asserted when any adc data register receives a new data sample. if a port is confgured to average 2 n samples, it takes 2 n sweeps for that port data register to be refreshed and assert adcdr. ? data registers are refreshed either at the end of a conversion (adc set in single-conversion mode) or at the end of a sweep (adc set in single-sweep or continuous-sweep mode). ? cleared after the interrupt register is read, and after both adcst[10:0] and adcst[11] registers are read subsequently. 2 adcdm adc data missed interrupt ? asserted when the host missed reading a ports adc data register by the time that ports adc data register is overwritten by new data. ? cleared after the interrupt register is read. 3 gpidr gpi event ready interrupt ? asserted when a new event is captured by gpi-confgured ports. the type of event is set by the corresponding gpi irq mode register. the host can then consult gpist[10:0] and gpist[11] registers to identify the port that caused the interrupt. ? cleared after the interrupt register is read, and after both gpist[10:0] and gpist[11] are read subsequently. 4 gpidm gpi event missed interrupt ? asserted when the host missed reading the gpi status register by the time that register is overwritten. ? must be used in conjunction with gpidr for proper operation. ? cleared after the interrupt register is read, and after both gpist[10:0] and gpist[11] are read subsequently. 5 dacoi dac driver overcurrent interrupt ? asserted when the dac driver current exceeds approximately 50ma. the host can then read dacoist[10:0] and dacoist[11] to identify the port that caused the interrupt. ? cleared after the interrupt register is read, and after both dacoist[10:0] and dacoist[11] registers are read subsequently. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
interrupt register (read) (continued) adc status registers (read) overcurrent status registers (read) maxim integrated 36 bit field name description 8:6 tmpint[2:0] internal temperature interrupts ? tmpint[2]: asserted when the internal temperature value is larger than the value stored in tmpinthi[11:0]. cleared after the interrupt register is read. ? tmpint[1]: asserted when the internal temperature value is lower than the value stored in tmpintlo[11:0]. cleared after the interrupt register is read. ? tmpint[0]: asserted when a new temperature value is available. cleared after the interrupt register is read. 11:9 tmpext1[2:0] 1st external temperature interrupts ? tmpext1[2]: asserted when the 1st external temperature value is larger than the value stored in tmpext1hi[11:0]. cleared after the interrupt register is read. ? tmpext1[1]: asserted when the 1st external temperature value is lower than the value stored in tmpext1lo[11:0]. cleared after the interrupt register is read. ? tmpext1[0]: asserted when a new temperature value is available. cleared after the interrupt register is read. 14:12 tmpext2[2:0] 2nd external temperature interrupts ? tmpext2[2]: asserted when the 2nd external temperature value is larger than the value stored in tmpext2hi[11:0]. cleared after the interrupt register is read. ? tmpext2[1]: asserted when the 2nd external temperature value is lower than the value stored in tmpext2lo[11:0]. cleared after the interrupt register is read. ? tmpext2[0]: asserted when a new temperature value is available. cleared after the interrupt register is read. 15 vmon high-voltage supply monitor interrupt ? asserted when the high voltage supply (avddio) falls below approximately 4v. ? cleared after the interrupt register is read. bit field name description 7:2 15:11 0 adcst[5:0] adcst[10:6] adcst[11] status of adc data received for ports 0 to 11 ? once new data is written in an adc data register, the corresponding adcst bit is asserted. the new data is written only after the set of samples to average is collected when the averaging function is enabled. ? this register content is not affected by any related interrupt mask. activity on adc-confgured ports is recorded by this register regardless of the mask interrupt register setting. ? cleared after the interrupt register is read, and after both adcst[10:0] and adcst[11] registers are read, subsequently. bit field name description 7:2 15:11 0 dacoist[5:0] dacoist[10:6] dacoist[11] status of dac drivers overcurrent for ports 0 to 11 ? once a port driver exceeds approximately 50ma, the host can identify which driver caused the interrupt by reading dacoist[10:0] and dacoist[11]. ? this register content is not affected by any related interrupt mask. activity on overcurrent detection is recorded by these registers regardless of the mask interrupt register setting. ? cleared after the interrupt register is read, and after both dacoist[10:0] and dacoist[11] registers are read, subsequently. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
internal temperature data register (read) 1st external temperature data register (read) 2nd external temperature data register (read) gpi status registers (read) maxim integrated 37 bit field name description 11:0 tmpintdat[11:0] internal temperature measurement data ? temperature measurement produced by the internal temperature sensor. ? the data sample is represented in twos complement, and one lsb represents 0.125c. bit field name description 11:0 tmpext1dat[11:0] 1st external temperature measurement data ? temperature measurement produced by the frst external temperature sensor. ? the data sample is represented in twos complement, and one lsb represents 0.125c. bit field name description 11:0 tmpext2dat[11:0] 2nd external temperature measurement data ? temperature measurement produced by the second external temperature sensor. ? the data sample is represented in twos complement, and one lsb represents 0.125c. bit field name description 7:2 15:11 0 gpist[5:0] gpist[10:6] gpist[11] status of gpi event detection for ports 0 to 11 ? asserted when an event is detected on a gpi-confgured port. the type of event to detect is set by the corresponding gpi irq register. ? once a gpidt interrupt is generated, the host can identify which gpi port(s) caused the interrupt by reading gpist[10:0] and gpist[11] registers. ? gpist content is not affected by any related interrupt mask. activity on gpi-confgured ports is recorded by gpist regardless of the mask interrupt register setting. ? cleared after the interrupt register is read, and after both gpist[10:0] and gpist[11] registers are read, subsequently. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
interrupt mask register (read/write) maxim integrated 38 bit field name description 0 adcflagmsk adc fag interrupt mask ? masks adcflag interrupt bit when asserted. ? in adc continuous-sweep mode, int is asserted for 100ns at the end of each sweep whether adcflag interrupt is cleared or not. ? 1: prevents the assertion of adcflag interrupt bit from pulling int low. ? 0: allows the assertion of adcflag interrupt bit to pull int low. 1 adcdrmsk adc data ready interrupt mask ? masks adcdr interrupt bit when asserted. ? 1: prevents the assertion of adcdr interrupt bit from pulling int low. ? 0: allows the assertion of adcdr interrupt bit to pull int low. 2 adcdmmsk adc data missed interrupt mask ? masks adcdm interrupt bit when asserted. ? 1: prevents the assertion of adcdm interrupt bit from pulling int low. ? 0: allows the assertion of adcdm interrupt bit to pull int low. 3 gpidrmsk gpi event ready interrupt ? masks gpidr interrupt bit when asserted. ? supersedes the settings in the gpi irq mode registers. ? 1: prevents the assertion of gpidr interrupt bit from pulling int low. ? 0: allows the assertion of gpidr interrupt bit to pull int low. 4 gpidmmsk gpi event missed interrupt mask ? masks gpidm interrupt bit when asserted. ? can be deasserted only if gpidrmsk is deasserted. ? 1: prevents the assertion of gpidm interrupt bit from pulling int low. ? 0: allows the assertion of gpidm interrupt bit to pull int low. 5 dacoimsk dac driver overcurrent interrupt mask ? masks dacoi interrupt bit when asserted. ? 1: prevents the assertion of dacoi interrupt bit from pulling int low. ? 0: allows the assertion of dacoi interrupt bit to pull int low. 8:6 tmpintmsk[2:0] internal temperature interrupt mask ? masks tmpint[2:0] interrupt bits when asserted on a bit-by-bit basis. ? 1: prevents the assertion of tmpint[i] interrupt bit from pulling int low (0i2). ? 0: allows the assertion of tmpint[i] interrupt bit to pull int low (0i2). 11:9 tmpext1msk[2:0] 1st external temperature interrupt mask ? masks tmpext1[2:0] interrupt bits when asserted on a bit-by-bit basis. ? 1: prevents the assertion of tmpext1[i] interrupt bit from pulling int low (0i2). ? 0: allows the assertion of tmpext1[i] interrupt bit to pull int low (0i2). 14:12 tmpext2msk[2:0] 2nd external temperature interrupt mask ? masks tmpext2[2:0] interrupt bits when asserted on a bit-by-bit basis. ? 1: prevents the assertion of tmpext2[i] interrupt bit from pulling int low (0i2). ? 0: allows the assertion of tmpext2[i] interrupt bit to pull int low (0i2). 15 vmonmsk high-voltage supply monitor mask ? masks vmon interrupt bit when asserted. ? 1: prevents the assertion of vmon interrupt bit from pulling int low. ? 0: allows the assertion of vmon interrupt bit to pull int low. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
gpi irq mode registers (read/write) device control register (read/write) maxim integrated 39 bit field name description 5:4 7:6 9:8 11:10 13:12 15:14 7:6 9:8 11:10 13:12 15:14 1:0 gpimd_0[1:0] gpimd_1[1:0] gpimd_2[1:0] gpimd_3[1:0] gpimd_4[1:0] gpimd_5[1:0] gpimd_6[1:0] gpimd_7[1:0] gpimd_8[1:0] gpimd_9[1:0] gpimd_10[1:0] gpimd_11[1:0] gpi interrupt request mode for ports 0 to 11 ? each input port is controlled by gpimd, a 2-bit code. ? for a given port i (0i11): ? gpimd_i[1:0] = 00: gpist[i] is never asserted ? gpimd_i[1:0] = 01: gpist[i] is asserted upon detection of a positive edge ? gpimd_i[1:0] = 10: gpist[i] is asserted upon detection of a negative edge ? gpimd_i[1:0] = 11: gpist[i] is asserted upon detection of a positive or a negative edge bit field name description 1:0 adcctl[1:0] adc conversion mode selection ? 00: idle mode C the adc does not perform any conversion. ? 01: single sweep C the adc performs one conversion for each of the adc-confgured ports sequentially. the assertion of cnvt triggers the single sweep. the sweep starts with the adc-confgured port of lowest index and stops with the adc-confgured port of highest index. ? 10: single conversion C the adc performs one conversion for the current port. it starts with the lowest index port that is adc-confgured, and it progresses to higher index ports as cnvt is asserted. ? 11: continuous sweep C this mode is not controlled by cnvt . the adc continuously sweeps the adc-confgured ports. 3:2 dacctl[1:0] dac mode selection ? 00: sequential update mode for dac-confgured ports. ? 01: immediate update mode for dac-confgured ports. the dac-confgured port that received new data is the next port to be updated. after updating that port, the dac- confgured port update sequence continues from that port onward. a minimum of 80s must be observed before requesting another immediate update. ? 10: all dac-confgured ports use the same data stored in dacprstdat1[11:0]. ? 11: all dac-confgured ports use the same data stored in dacprstdat2[11:0]. 5:4 adcconv[1:0] adc conversion rate selection ? 00: adc conversion rate of 200ksps (default) ? 01: adc conversion rate of 250ksps ? 10: adc conversion rate of 333ksps ? 11: adc conversion rate of 400ksps MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
device control register (read/write) (continued) gpi data registers (read) maxim integrated 40 bit field name description 6 dacref dac voltage reference selection ? 0: external reference voltage ? 1: internal reference voltage 7 thshdn thermal shutdown enable ? 0: thermal shutdown function disabled. ? 1: thermal shutdown function enabled. if the internal temperature monitor is enabled, and if the internal temperature is measured to be larger than 145c, the device is reset, thus bringing all channels to high-impedance mode and setting all registers to their default value. 10:8 tmpctl[2:0] temperature monitor selection ? tmpctl[0]: internal temperature monitor (0: disabled; 1: enabled) ? tmpctl[1]: 1st external temperature monitor (0: disabled; 1: enabled) ? tmpctl[2]: 2nd external temperature monitor (0: disabled; 1: enabled) 11 tmpper temperature conversion time control ? 0: default conversion time setting. selected for junction capacitance flter < 100pf . ? 1: extended conversion time setting. selected for junction capacitance flter from 100pf to 390pf 12 rs_cancel temperature sensor series resistor cancellation mode ? 0: temperature sensor series resistance cancellation disabled. ? 1: temperature sensor series resistance cancellation enabled. 13 lpen power mode selection ? 0: default power mode for normal operations ? 1: lower power mode. the analog ports are in high-impedance mode. the device can be brought out of the lower power mode by deasserting this bit. the device would then undergo the regular power-on sequence. 14 brst serial interface burst-mode selection ? 0: default address incrementing mode. the address is automatically incremented by 1 in burst mode. ? 1: contextual address incrementing mode. in burst mode, the address automatically points to the next adc- or dac-confgured port data register. specifcally, when reading adc data (writing dac data), the serial interface reads (writes to) only the data registers of those ports that are adc-confgured (dac-confgured). this mode applies to adc data read and dac data write, not dac data read. 15 reset soft reset control ? self-clearing soft reset register, equivalent to power-on reset. bit field name description 7:2 15:11 0 gpidat[5:0] gpidat[10:6] gpidat[11] data received on gpi ports 0 to 11 ? the data received on gpi-confgured ports can be read by the host. ? for a given port i (0i11) ? gpidat[i] = 0: a logic zero level is received at gpi port i ? gpidat[i] = 1: a logic one level is received at gpi port i MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
gpo data registers (read/write) dac preset data registers (read/write) temperature monitor confguration register (read/write) internal temperature monitor high threshold register (read/write) maxim integrated 41 bit field name description 7:2 15:11 0 gpodat[5:0] gpodat[10:6] gpodat[11] data transmitted through gpo ports 0 to 11 ? data written by the host to be transmitted through the gpo-confgured ports ? for a given port i (0 i 11): ? gpidat[i] = 0: a logic zero level is transmitted through gpo port i ? gpidat[i] = 1: a logic one level is transmitted through gpo port i bit field name description 11:0 11:0 dacprstdat1[11:0] dacprstdat2[11:0] dac preset data register 1 and 2 ? dac data used by all ports confgured in a dac-related mode (1, 3, 4, 5, 6, and 10) ? writing to these registers does not alter the contents of the dac data registers bit field name description 1:0 tmpintmoncfg[1:0] number of samples averaged for calculating the internal temperature ? 00: 4 samples ? 01: 8 samples ? 10: 16 samples ? 11: 32 samples 3:2 tmpext1moncfg[1:0] number of samples averaged for calculating the 1st external temperature ? 00: 4 samples ? 01: 8 samples ? 10: 16 samples ? 11: 32 samples 5:4 tmpext2moncfg[1:0] number of samples averaged for calculating the 2nd external temperature ? 00: 4 samples ? 01: 8 samples ? 10: 16 samples ? 11: 32 samples bit field name description 11:0 tmpinthi[11:0] internal temperature monitor high threshold ? maximum temperature value beyond which tmpint[2] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
internal temperature monitor low threshold register (read/write) 1st external temperature monitor high threshold register (read/write) 1st external temperature monitor low threshold register (read/write) 2nd external temperature monitor high threshold register (read/write) 2nd external temperature monitor low threshold register (read/write) maxim integrated 42 bit field name description 11:0 tmpintlo[11:0] internal temperature monitor low threshold ? minimum temperature value below which tmpint[1] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. bit field name description 11:0 tmpext1hi[11:0] 1st external temperature monitor high threshold ? maximum temperature value beyond which tmpext1[2] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. bit field name description 11:0 tmpext1lo[11:0] 1st external temperature monitor low threshold ? minimum temperature value below which tmpext1[1] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. bit field name description 11:0 tmpext2hi[11:0] 2nd external temperature monitor high threshold ? maximum temperature value beyond which tmpext2[2] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. bit field name description 11:0 tmpext2lo[11:0] 2nd external temperature monitor low threshold ? minimum temperature value below which tmpext2[1] is asserted. ? this value is represented in twos complement; one lsb represents 0.125c. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
port confguration registers (read/write) maxim integrated 43 bit field name description 11:0 funcprm_0[11:0] funcprm_1[11:0] funcprm_2[11:0] funcprm_3[11:0] funcprm_4[11:0] funcprm_5[11:0] funcprm_6[11:0] funcprm_7[11:0] funcprm_8[11:0] funcprm_9[11:0] funcprm_10[11:0] funcprm_11[11:0] funcprm_i[4:0]: associated port ? defnes the port to use in conjunction with a port confgured in mode 4, 8, or 1 1. ? the associated port addresses are : funcprm_i[7:5]: # of samples (for adc-related functional modes only) ? defnes the number of samples to be captured and averaged before loading the result in the ports adc data register. the coding of the number of samples is 2# of samples. the number of samples to average can be 1, 2, 4, 8, 16, 32, 64, or 128. associated port name corresponding address p0 0x02 p1 0x03 p2 0x04 p3 0x05 p4 0x06 p5 0x07 p6 0x0b p7 0x0c p8 0x0d p9 0x0e p10 0x0f p11 0x10 funcprm_i[10:8]: range ? determines the input voltage range of ports confgured in input modes, or the output voltage range of ports confgured in output modes. ? in adc- or dac-related modes, range cannot be set to 000. voltage range codes adc voltage range (v) dac voltage range (v) 000 no range selected no range selected 001 0 to +10 0 to +10 010 -5 to +5 -5 to +5 0 11 -10 to 0 -10 to 0 100 0 to +2.5 -5 to +5 101 reserved reserved 11 0 0 to +2.5 0 to +10 111 reserved reserved funcprm_i[11]: avr (for mode 6 only) ? adc voltage reference selection ? 0: adc internal voltage reference ? 1: adc dac voltage reference determined by dacref funcprm_i[11]: inv (for gpi-controlled functional modes only) ? asserted to invert the data received by the gpi-confgured port. ? 0: data received from gpi-confgured port is not inverted ? 1: data received from gpi-confgured port is inverted MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
port configuration registers (read/write) (continued) maxim integrated 44 bit field name description 15:12 funcid_0[3:0] funcid_1[3:0] funcid_2[3:0] funcid_3[3:0] funcid_4[3:0] funcid_5[3:0] funcid_6[3:0] funcid_7[3:0] funcid_8[3:0] funcid_9[3:0] funcid_10[3:0] funcid_11[3:0] functional mode for port i (0i11) ? when switching from one mode to another, it is recommended to frst switch to the high- impedance mode. the duration for which the device may need to stay in the transitional high- impedance mode depends on the application and hardware confguration. ? 0000: mode 0 - high impedance ? the port is confgured in high-impedance mode. ? 0001: mode 1 - digital input with programmable threshold, gpi (figure 7) ? the port is confgured as a gpi whose threshold is set through the dac data register . the dac data register for that port needs to be set to the value corresponding to the intended input threshold voltage. any input voltage above that programmed threshold is reported as a logic one. the input voltage must be between 0v and 5v. ? to avoid false interrupts, the ports gpiermsk register bit must be asserted. the dac data register can then be set for the desired threshold voltage. it may take up to 1ms for the threshold voltage to be effective. the ports gpimd register bit is set next. at that point, gpiermsk can be deasserted for the port to start detecting events. the data resulting from the comparison between the threshold voltage and the voltage at the port can be read from the corresponding gpidat register bit. ? 0010: mode 2 - bidirectional level translator terminal (figure 10) ? any pair of adjacent ports can form a bidirectional level translator path. only the lower index port of the pair needs to be confgured to enable this mode. the other port (index + 1) must be set in high-impedance mode. ? ports 5 and 11 cannot be set in mode 2. ? the activity on this port is observable through its gpi path. the gpi-related registers are confgured as described for mode 1. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
port configuration registers (read/write) (continued) maxim integrated 45 bit field name description ? 0011: mode 3 - register-driven digital output with dac-controlled level, gpo (figure 8) ? the port is confgured as a gpo driven by the corresponding gpoda t register bit. the logic one level is set by the dac data register of that port. ? the ports dac data register needs to be set frst. it may require up to 1ms for the port to be ready to produce the desired logic one level. at that point, the port can be set in mode 3. the logic level at the port is then controlled by the corresponding gpodat register bit. ? 0100: mode 4 - unidirectional path output with dac-controlled level, gpo (figure 9) ? the port is confgured as a gpo forming the output of a unidirectional level translator path. the input port of that path is specifed by the functional parameter, associated port, and that port must be separately confgured in gpi mode. the ports dac data register defnes the logic one level. the data received by the gpi- confgured port is transmitted by this port confgured in mode 4. ? the data from the associated gpi-confgured port can be inverted by asserting the functional parameter inv. ? multiple ports confgured in mode 4 can refer to the same gpi-confgured port through the functional parameter, associated port. therefore, one gpi- confgured port can transmit its data to multiple ports confgured in mode 4. ? to avoid false interrupts and unexpected activity at the port confgured in mode 4, the gpi port must be confgured before this port is confgured in mode 4. ? functional parameters to be set: inv, associated port ? 0101: mode 5 - analog output for dac (figure 5) the ports dac data register must be set for the desired voltage at the port. it may take up to 1ms for the port to refect the data written in the dac data register . ? functional parameters to be set: range (codes 001, 010, and 011 apply to this mode). ? 0110: mode 6 - analog output for dac with adc monitoring (figure 6) ? in addition to the functionality of mode 5, the port is sampled by the adc. the result of the adc conversion is stored in the ports adc data register. the host can access that register to monitor the voltage at the port. ? when the adc input voltage range is set from 0v to 2.5v, (range = 100 or 110), the dac data register value must be limited to the range of values corresponding to 0v to 2.5v at the port. internally, the dac data register value is clipped, so that the pixi port voltage is contained within a range from 0v to 5v to prevent device damage. ? functional parameters to be set: avr, range ? 0111: mode 7 - positive analog input to single-ended adc (figure 2) ? the port is confgured as a single-ended adc input. ? functional parameters to be set: range, # of samples ? 1000: mode 8 - positive analog input to differential adc (figure 3) ? the port is confgured as a differential adc positive input. ? functional parameters to be set: range, # of samples, associated port MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
port configuration registers (read/write) (continued) maxim integrated 46 bit field name description ? 1001: mode 9 C negative analog input to differential adc ? the port is confgured as a differential adc negative input. ? the number of samples to average is defned by the associated positive port. the functional parameter range must be identical to that used by the corresponding positive port. ? a port confgured in mode 9 can be associated to more than one port confgured in mode 8. ? functional parameter to be set: range ? 1010: mode 10 C analog output for dac and negative analog input to differential adc (figure 4) ? while this port drives the voltage corresponding to its dac data register, it also operates as the negative input for the adc. ? the number of samples to average is defned by the associated positive port. the functional parameter range must be identical to that used by the corresponding positive port. ? a port confgured in mode 10 can be associated to more than one port confgured in mode 8. ? when the adc input voltage range is set from 0v to 2.5v (range = 100 or 110), the dac data register value must be limited to the range of values corresponding to 0v to 2.5v at the port. internally, the dac data register value is clipped, so that the pixi port voltage is contained within a range from 0v to 5v to prevent device damage. ? functional parameter to be set: range ? 1011: mode 11 C terminal to gpi-controlled analog switch (figure 11) ? in this mode, two adjacent ports can be connected together through an analog switch controlled by a gpi-confgured port (designated by the functional parameter associated port). this function involves three ports. the switch controlling port needs to be separately confgured in gpi mode. only the port with the lower index needs to be confgured in mode 11. the port with the higher index can be confgured in any other mode, except mode 2. if the port of higher index operates in an adc- related mode (mode 6, 7, 8, or 9), the signals applied to the port in mode 11 must comply with the input voltage range for which the port of higher index is confgured. ? ports 5 and 11 cannot be confgured in mode 11, as there is no switch between ports 5 and 6 and between ports 11 and 0. ? functional parameters to be set: inv, associated port ? 1100: mode 12 C terminal to register-controlled analog switch ? this mode is identical to mode 11, except that the switch remains closed as long as this port is confgured in mode 12. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
table 7. port functional modes * port must be configured separately to a compatible mode. maxim integrated 47 funcid[3:0] funcprm[11:0] mode description 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 high impedance 0 0 0 0 1 digital input with programmable threshold, gpi 0 0 0 1 2 bidirectional level translator terminal 0 0 1 0 3 register-driven digital output with dac- controlled level, gpo 0 0 1 1 4 unidirectional path output with dac- controlled level, gpo 0 1 0 0 inv associated port* 5 analog output for dac 0 1 0 1 range 6 analog output for dac with adc monitoring 0 1 1 0 0 range 7 positive analog input to single-ended adc 0 1 1 1 0 range # of samples 8 positive analog input to differential adc 1 0 0 0 0 range # of samples associated port* 9 negative analog input to differential adc 1 0 0 1 0 range 10 analog output for dac and negative analog input to differential adc (pseudo-differential mode) 1 0 1 0 0 range 11 terminal to gpi- controlled analog switch 1 0 1 1 inv associated port* 12 terminal to register- controlled analog switch 1 1 0 0 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
adc data registers (read) dac data registers maxim integrated 48 bit field name description 11:0 adcdat_0[11:0] adcdat_1[11:0] adcdat_2[11:0] adcdat_3[11:0] adcdat_4[11:0] adcdat_5[11:0] adcdat_6[11:0] adcdat_7[11:0] adcdat_8[11:0] adcdat_9[11:0] adcdat_10[11:0] adcdat_11[11:0] adc data for port i (0i11) ? 12-bit data produced by the adc when converting the analog input signal on port i. ? the conversion result is represented in straight binary for ports confgured in single- ended mode (modes 6, 7), and in twos complement for ports confgured as an adc positive input (mode 8) in differential or pseudo-differential mode (mode 9). the adc data register of the port confgured as an adc negative input in differential (mode 9) or pseudo-differential mode (mode 10) contains 0x0000. bit field name description 11:0 dacdat_0[11:0] dacdat_1[11:0] dacdat_2[11:0] dacdat_3[11:0] dacdat_4[11:0] dacdat_5[11:0] dacdat_6[11:0] dacdat_7[11:0] dacdat_8[11:0] dacdat_9[11:0] dacdat_10[11:0] dacdat_11[11:0] dac data for port i (0 i 11) ? 12-bit dac data for port i. ? the data is represented in straight binary. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
figure 12. flow chart for initial configuration of pixi ports maxim integrated 49 is mode 1 , 3 , 4 , 5 , 6 , or 10 used ? configure dacref , dacctl wait 200 s enter dacdat [ i ] for ports in mode 1 , 3 , 4 , 5 , 6 , or 10 * are all ports in mode 3 , 4 , 5 , 6 , or 10 configured ? configure funcid [ i ] , funcprm [ i ] for ports in mode 1 wait 200 s times the number of ports in mode 1 configure funcid [ i ] , funcprm [ i ] for selected port wait 1 ms select first port in mode 3 , 4 , 5 , 6 , or 10 select next port in mode 3 , 4 , 5 , 6 , or 10 is mode 7 , 8 , or 9 used ? select first port in mode 9 configure funcid [ i ] , funcprm [ i ] for selected port wait 100 s select first port in mode 7 or 8 configure funcid [ i ] , funcprm [ i ] for selected port wait 100 s are all ports in mode 9 configured ? select next port in mode 9 are all ports in mode 7 or 8 configured ? select next port in mode 7 or 8 is mode 2 , 11 , or 12 used ? configure funcid [ i ] , funcprm [ i ] for ports in mode 2 , 11 , or 12 configure interrupt masks (... msk ) are temperature sensors used ? configure tmpper , rscancel , tmp ... moncfg configure adcctl configure tmpctl configure brst , thshdn , adcconv y y y y y y y n n n n n n n start of configuration configure gpodat [ i ] for ports in mode 3 end of configuration configure gpimd [ i ] for ports in mode 1 is dacctl = 2 or 3 ? y n enter dacprstdat 1 or dacprstdat 2 configure tmp ... hi and tmp ... lo MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
confguration software (gui) to simplify use of the MAX11312, maxim has created a gui for customers to easily configure the device for unique application needs with a simple drag and drop. the software generates register addresses and corresponding register values. figure 13 shows an example of this software with a few function connections. figure 13. example of gui to develop configuration file maxim integrated 50 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
confguration software output file supply voltage avssio -2.5 avddio 12.5 dvdd 3.3 avdd 5 dac_ref 2.5 adc_ext_ref 2.5 name address value description gpo_data_p10p6_p5p0 0x0d 0x0000 gpo data for pixi ports p10 to p6 and p5 to p0 gpo_data_p11 0x0e 0x0000 gpo data for pixi port p11 device_control 0x10 0x00c0 device main control register interrupt_mask 0x11 0xffff interrupt mask register gpi_irqmode_p5_p0 0x12 0x0000 gpi ports p5 to p0 mode register gpi_irqmode_p10_p6 0x13 0x0000 gpi ports p10 to p6 mode register gpi_irqmode_p11 0x14 0x0000 gpi port p11 mode register dac_preset_data_1 0x16 0x0000 dac preset data #1 dac_preset_data_2 0x17 0x0000 dac preset data #2 tmp_mon_cfg 0x18 0x0000 temperature monitor confguration tmp_mon_int_hi_thresh 0x19 0x07ff internal temperature monitor high threshold tmp_mon_int_lo_thresh 0x1a 0x0800 internal temperature monitor low threshold tmp_mon_ext1_hi_thresh 0x1b 0x07ff 1st external temperature monitor high threshold tmp_mon_ext1_lo_thresh 0x1c 0x0800 1st external temperature monitor low threshold tmp_mon_ext2_hi_thresh 0x1d 0x07ff 2nd external temperature monitor high threshold tmp_mon_ext2_lo_thresh 0x1e 0x0800 2nd external temperature monitor low threshold reserved_20 0x20 0x0000 confguration register for (reserved) n.c. reserved_21 0x21 0x0000 confguration register for (reserved) n.c. port_cfg_p0 0x22 0x7100 confguration register for pixi port p0 single ended adc port_cfg_p1 0x23 0x5100 confguration register for pixi port p1 dac port_cfg_p2 0x24 0x9100 confguration register for pixi port p2 differential adc (+) port_cfg_p3 0x25 0x9100 confguration register for pixi port p3 differential adc (-) port_cfg_p4 0x26 0x6100 confguration register for pixi port p4 dac with adc monitoring port_cfg_p5 0x27 0x1000 confguration register for pixi port p5 gpi reserved_28 0x28 0x0000 confguration register for (reserved) n.c. reserved_29 0x29 0x0000 confguration register for (reserved) n.c. maxim integrated 51 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
confguration software output file (continued) name address value description reserved_2a 0x2a 0x0000 confguration register for (reserved) n.c. port_cfg_p6 0x2b 0x3000 confguration register for pixi port p6 gpo port_cfg_p7 0x2c 0x0000 confguration register for pixi port p7 software controlled analog switch port_cfg_p8 0x2d 0x0000 confguration register for pixi port p8 software controlled analog switch port_cfg_p9 0x2e 0x1000 confguration register for pixi port p9 level translator port_cfg_p10 0x2f 0x4009 confguration register for pixi port p10 level translator port_cfg_p11 0x30 0x5100 confguration register for pixi port p11 dac reserved_31 0x31 0x0000 confguration register for (reserved) n.c. reserved_32 0x32 0x0000 confguration register for (reserved) n.c. reserved_33 0x33 0x0000 confguration register for (reserved) n.c. reserved_60 0x60 0x0000 dac data register for (reserved) n.c. reserved_61 0x61 0x0000 dac data register for (reserved) n.c. dac_data_port_p0 0x62 0x0000 dac data register for pixi port p0 single ended adc dac_data_port_p1 0x63 0x0000 dac data register for pixi port p1 dac dac_data_port_p2 0x64 0x0000 dac data register for pixi port p2 differential adc (+) dac_data_port_p3 0x65 0x0000 dac data register for pixi port p3 differential adc (-) dac_data_port_p4 0x66 0x0000 dac data register for pixi port p4 dac with adc monitoring dac_data_port_p5 0x67 0x0666 dac data register for pixi port p5 gpi reserved_68 0x68 0x0000 dac data register for (reserved) n.c. reserved_69 0x69 0x0000 dac data register for (reserved) n.c. reserved_6a 0x6a 0x0000 dac data register for (reserved) n.c. dac_data_port_p6 0x6b 0x0666 dac data register for pixi port p6 gpo dac_data_port_p7 0x6c 0x0000 dac data register for pixi port p7 software controlled analog switch dac_data_port_p8 0x6d 0x0000 dac data register for pixi port p8 software controlled analog switch dac_data_port_p9 0x6e 0x0666 dac data register for pixi port p9 level translator dac_data_port_p10 0x6f 0x0666 dac data register for pixi port p10 level translator dac_data_port_p11 0x70 0x0000 dac data register for pixi port p11 dac reserved_71 0x71 0x0000 dac data register for (reserved) n.c. reserved_72 0x72 0x0000 dac data register for (reserved) n.c. reserved_73 0x73 0x0000 dac data register for (reserved) n.c. maxim integrated 52 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
layout, grounding, bypassing for best performance, use pcbs with a solid ground plane. ensure that digital and analog signal lines are separated from each other. do not run analog and digital (especially clock) lines parallel to one another or digital lines underneath the MAX11312 package. noise in avdd, agnd, avddio, avssio, adc_ref_int, and dac_ ref affects the device performance. bypass avdd, dvdd, avddio, and avssio to ground with 0.1f and 10f bypass capacitors. bypass adc_int_ref and dac_ref to ground with capacitors whose values are shown in the ref electrical characteristics table. place the bypass capacitors as close as possible to the respective pins and minimize capacitor lead and trace lengths for best supply-noise rejection. for optimum heat dissipation, connect the exposed pad (ep) to a large copper area, such as a ground plane. +denotes a lead(pb)-free/rohs-compliant package. ep = exposed pad. *t = tape and reel. maxim integrated 53 ordering information chip information process: bicmos package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. part temp range pin-package MAX11312gtj+ -40c to +105c 32 tqfn-ep* MAX11312gtj+t -40c to +105c 32 tqfn-ep* package type package code outline no. land pattern no. 32 tqfn-ep t3255+9 21-0140 90-0015 MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio www.maximintegrated.com
? 2016 maxim integrated products, inc. 54 revision history revision number revision date description pages changed 0 2/16 initial release maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifcations without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. MAX11312 pixi, 12-port programmable mixed-signal i/o with 12-bit adc, 12-bit dac, analog switches, and gpio for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com.

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